1. Field of the Invention
The present invention relates to an analog-to-digital conversion method and a related analog to digital converter (ADC), and more particularly, to a method of utilizing multiple reference voltages and a single ramp generator to realize a two-step analog to digital conversion and a related ADC.
2. Description of the Prior Art
Speed of picture sensor becomes faster and is capable of capturing pictures of various objects more accurately (e.g. via visible light, infrared light, etc.). For example, cameras having the capability of capturing 120 pictures of 10M pixels per second become commercial goods in daily life. Similarly, sensors with ultra-high speed (10,000 pictures per second) and high accuracy are developed for biochemistry, robot and architecture, etc. In order to satisfy market demand to keep improving such images, attention should be made on system design and technology innovation, e.g. enhancement of speed and sensor quality, and simplified image sensor realized by stacking multiple integrated circuits. Besides, development of new read-out structure may realize a higher reading speed. However, such improvements require innovation of the analog to digital converters (ADC), in order to reduce area and power consumption, and enhance speed and resolution.
With the progress of integrated circuit process technology, bit numbers of a digital signal outputted by the ADC become higher. In other words, values of the digital signal are more analogous to the inputted analog signal. Of course, the increase of the bit number of the digital signal may also lead to more complexity of the circuit, layout area and noise reduction requirements in the ADC. The published patents teaching ADC and related methods are recited as follows.
United States publication number US 20120025062 discloses a mix-mode ADC, an image sensor and a method of providing a plurality of digital codes. However, a large number of capacitors are required to realize this patent and thus a larger pixel sensor should be utilized. Therefore, smaller image sensors may not be realized.
“Multiple-Ramp Column-Parallel ADC Architectures for CMOS Image Sensor” in IEEE Journal discloses an image sensor capable of processing analog to digital conversion in parallel by using a multiple-ramp single-slope ADC. One of the drawbacks of this article is that multiple ramp generators are required, to generate a power consumption problem.
European patent number EP 1351490 discloses an image sensor capable of improving a reading circuit, and U.S. Pat. No. 6,670,904 discloses a two-ramp ADC for complementary metal oxide semiconductor. However, realizations of these patents are only limited to a linear search.